U.S. Pat. No. 4,677,648 to Zurfluh, assigned to the assignee of the present invention, discloses a digital phase-locked loop wherein a chain of delay elements implements phase offset detection and clock signal phase shifting. No sampling or control signals are used having a frequency higher than that of the local master clock. However, continual estimation is required of the number of delay elements in a delay element string that is required for a delay time equal to one period of the local clock; and a look-up table is required to correct the phase offset to a phase selection value.
In the co-pending application. U.S. Ser. No. 07/121,667 filed Nov. 17, 1987, assigned to the assignee of the present invention, a digital phase-locked correction loop is reset by subtracting one local clock cycle whenever the buildup of successive delay increments added to the system clock equals a full local clock cycle.
While these digital phase-locked devices operate satisfactorily, there is a need for a device and method which does not require any of the components required by analog or digital phase-locked loops (e.g. VCOs, frequency multipliers, phase detectors, microprocessors, comparators, etc.) There is a need for an improved device wherein phase locking of the incoming data stream to the local clock can be achieved within a preselected number of bit transitions, preferably an integral multiple of a selection cycle corresponding to the number of clock signals required to sequentially clock a register and a selection register. There is also a need for a device and method capable of operating at multiple data rates without requiring that the length of a delay element string be calibrated or recalibrated in order to insure that the total delay time will be equal to the local clock period. Finally, it is desirable that the phase-locked device be so compact and configured that it can be implemented on a VLSI chip, while at the same time retaining the feature of the above-cited prior art whereby no circuit element operates at a frequency higher than that of the local clock.